A Grounded Capacitance Multiplier Circuit Employing VDTA

Abstract

Capacitors occupy very large area on chips. To reduce the occupation area on chip for circuits employing large capacitances, capacitance multipliers are used. In this work, a new design of Voltage Differencing Transconductance Amplifier (VDTA) based capacitance multiplier and its CMOS implementation are proposed. The multiplication factor of the proposed circuit is 115. The design of the proposed grounded capacitor multiplier is verified with the simulations in Cadence environment with 0.18 µm TSMC technology. © 2022 Elsevier B.V., All rights reserved.