High Speed Comparator Design for the Implementation of Successive Approximation Register ADC
dc.contributor.author | Ersin Alaybeyoglu | |
dc.date.accessioned | 2023-02-10T12:35:36Z | |
dc.date.available | 2023-02-10T12:35:36Z | |
dc.date.issued | 2019 | |
dc.identifier | 10.1109/ISMSIT.2019.8932893 | |
dc.identifier.issn | 0 | |
dc.identifier.uri | https://dx.doi.org/10.1109/ISMSIT.2019.8932893 | |
dc.identifier.uri | http://hdl.handle.net/11772/11241 | |
dc.source | 3rd International Symposium on Multidisciplinary Studies and Innovative Technologies, ISMSIT 2019 - Proceedings | |
dc.subject | - | |
dc.title | High Speed Comparator Design for the Implementation of Successive Approximation Register ADC | |
dc.type | Conference Paper | |
dc.identifier.volume | 0 | |
dc.identifier.issue | 0 |
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