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Determination of Power MOSFET's Gate Oxide Degradation Under Different Electrical Stress Levels Based on Stress-Induced Oxide Capacitance Changes

dc.contributor.authorHatice Gul Sezgin-Ugranli,Yasin Ozcelep
dc.date.accessioned2023-02-10T12:28:49Z
dc.date.available2023-02-10T12:28:49Z
dc.date.issued2021
dc.identifier10.1109/TED.2020.3044269
dc.identifier.issn1557-9646
dc.identifier.urihttps://dx.doi.org/10.1109/TED.2020.3044269
dc.identifier.urihttp://hdl.handle.net/11772/9837
dc.sourceIEEE TRANSACTIONS ON ELECTRON DEVICES
dc.subjectElectrical and Electronic Engineering
dc.titleDetermination of Power MOSFET's Gate Oxide Degradation Under Different Electrical Stress Levels Based on Stress-Induced Oxide Capacitance Changes
dc.typeArticle
dc.identifier.volume68
dc.identifier.issue2


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